Efficient Metadata Management for Large Block Volume

As storage volumes grow to petabyte scale, the metadata that tracks block-to-physical mappings becomes a performance bottleneck. Traditional approaches store this metadata in DRAM, but at large volume sizes, the metadata itself consumes significant memory. Moving metadata to slower storage tiers solves the capacity problem but introduces latency on every I/O operation.

CXL-attached Persistent Memory as Metadata Store

This patent proposes using CXL-attached persistent memory devices as the metadata storage tier. CXL memory offers latency much closer to DRAM than traditional storage, while providing the capacity to hold metadata for very large volumes. Crucially, the persistence property means metadata survives power failures without the overhead of write-ahead logging or periodic checkpointing.

Novel Indexing Scheme

Beyond choosing the right storage medium, the patent describes an indexing scheme specifically designed for metadata structures that map logical block addresses to physical locations at scale. The scheme is optimized for the access patterns of metadata workloads — which differ from application data access patterns — and leverages the byte-addressability of CXL memory rather than treating it as a block device.

Context

This work emerged from a Samsung Semiconductor internship (2024) focused on CXL-attached persistent memory. Analysis of real CXL memory I/O performance data revealed that metadata management for large volumes was a natural fit for the latency and capacity characteristics of CXL-attached persistent memory.

Patent filed October 2024 (USPTO Application No. 63/702,803). Inventors: Manoj P. Saha, Somnath Roy, Benixon Arul Dhas, Harsh Roogi.